硅通孔内铜电沉积填充机理研究进展

doi:10.13208/j.electrochem.2213001

摘要/Abstract

摘要：

上海交通大学多元兼容集成制造技术团队针对TSV互连的深孔填充电镀难题, 借助有限元软件和任意拉格朗日-欧拉算法, 完成了方程组的数值解算, 实现了TSV填充模式的数值仿真。利用有限元和任意拉格朗日-欧拉算法分析了盲孔的填充机制, 通孔的蝴蝶形式的电镀填充过程, 以及不同深宽比孔的同时填充模式,并利用仿真数据进行了样品的研制及参数优化。分析了电镀的电流密度和热处理温度对电镀填充TSV-Cu的力学属性的影响。通过原位压缩试验研究了电流密度对TSV-Cu的力学性能和显微组织的影响。利用单轴薄膜拉伸试验分析了热处理工艺对TSV-Cu材料属性的影响。结果表明, 随着热处理温度的升高, TSV-Cu的断裂强度和屈服强度明显下降, 杨氏模量呈波纹状变化但变化趋势缓慢。基于上述研究结果, 研究了热失配应力所导致的互连结构热变形机制, 通过自主搭建的原位测试系统,实时观测TSV-Cu随温度变化而产生的变形大小,以研究影响TSV-Cu互连热应力应变的规律。结果表明, TSV-Cu 的热变形过程分为弹性变形阶段、类塑性强化阶段以及塑性变形阶段。

关键词: 硅通孔, 数值模拟, 铜电沉积机理, 任意拉格朗日-欧拉, 2.5D转接板

Abstract:

Aiming at the electroplating filling problem of deep via TSV (through silicon via) interconnection, the multi-compatible integrated manufacturing technology team at the Shanghai Jiao Tong University has completed the numerical solution of the equations and realized the numerical simulation of TSV filling mode by applying the finite element method with arbitrary Lagrange Euler algorithm. The filling mechanisms of blind vias, the butterfly filling form for the through vias and the simultaneous filling mode of vias with different aspect ratios are analyzed by simulation, contributing to the parameter optimization and sample manufacturing. The effects of electroplating current density and heat treatment temperature on the mechanical properties of electroplating filled TSV-Cu were investigated by in-situ compression test and uniaxial film tensile test. With the increase of heat treatment temperature, the fracture strength and yield strength decreased significantly, and the Young's modulus changed slowly in a corrugated shape. The influence of the current density was more complexed. Based on the above research results, the thermal deformation mechanism of interconnection structure caused by thermal mismatch stress was studied through the self-built in-situ testing system, which gives change in the real-time deformation of TSV-Cu with temperature. The results showed that the thermal deformation process can be divided into the elastic deformation stage, the quasi plastic strengthening stage and the plastic deformation stage.

Key words: through silicon via, numerical simulation, Cu electrodeposition mechanism, arbitrary lagrange-eulerian, 2.5-dimension interposer

孙云娜, 吴永进, 谢东东, 蔡涵, 王艳, 丁桂甫. 硅通孔内铜电沉积填充机理研究进展[J]. 电化学（中英文）, 2022, 28(7): 2213001.

Yun-Na Sun, Yong-Jin Wu, Dong-Dong Xie, Han Cai, Yan Wang, Gui-Fu Ding. Research Progress of Copper Electrodeposition Filling Mechanism in Silicon Vias[J]. Journal of Electrochemistry, 2022, 28(7): 2213001.

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链接本文: https://electrochem.xmu.edu.cn/CN/10.13208/j.electrochem.2213001

https://electrochem.xmu.edu.cn/CN/Y2022/V28/I7/2213001

图/表 20

Figure 8

参考文献 26

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Definition		Time range (min)	Current density (mA·cm^-2)	Time range (min)	Current density (mA·cm^-2)
M1	S1	0 ~ 60	1	60 ~ 120	3
	S2	120 ~ 150	6	-	-
	S3	150 ~ 180	6	-	-
M2		0 ~ 90	3	90 ~ 180	9

		Room temperature	100 ^oC	200 ^oC	300 ^oC	400 ^oC
Crystal plane	(111)	0.028	0.058	0.042	0.055	0.040
	(200)	0.026	0.057	0.063	0.060	0.042
	(220)	0.753	0.389	0.278	0.190	0.123
	(311)	0.193	0.496	0.617	0.695	0.795
Young’s modulus (GPa)		70.98 ~ 176.33	76.81 ~ 154.44	77.37 ~ 147.74	79.20 ~ 142.37	79.55 ~ 138.15